Self-programming circuit

ABSTRACT

Circuit (SPSA) has a processing unit (VE) with an electrically erasable and electrically programmable read-only memory (EEPROM), a classification unit (KE) and an interface unit (EIF) for the read-only memory. The processing unit (VE) reads out from the read-only memory (EEPROM) instructions and/or data which have been automatically programmed in by a classification unit (KE) and an interface unit (EIF), as a function of input values (E) and/or internal values (ED, S) and/or output values (A) of the processing unit (VE). The processing unit may in this case take the form of a fuzzy controller or else a customary microprocessor. The advantage achieved hereby is, in particular, that the arrangement automatically adapts itself to the variance in structure (type diversity) and variance in time (ageing, wear) of a product and consequently the circuit has a wider range of applications and can be used optimally for a longer period of time.

BACKGROUND OF THE INVENTION

To ensure the best possible operating behavior of an overall system, itis advisable for a respective circuit belonging to the overall system tobe matched to the rest of the overall system. If the rest of the overallsystem then changes, for example due to ageing, wear or else because therest of the overall system has characteristics which differ on accountof a varied range of types, operating behavior is generally no longer atan optimum.

U.S. Pat. No. 5,259,063 discloses a self-programming circuit in which aprocessing unit with an electrically erasable and electricallyprogrammable read-only memory (EEPROM), a classification unit in theform of a central processor and an interface unit are provided, theprocessing unit reading out processing information from the read-onlymemory, in which circuit input values and/or internal values areprocessed in the classification unit to give classification results, theinput values of the circuit also representing input values of theself-programming processing unit, and in which circuit an interface unitis provided in such a way that from one of the classification resultsthere is generated at least one EEPROM address and at least one EEPROMdatum (ED) and the read-only memory (EEPROM) is programmed therewith.

Furthermore, German Offenlegungsschrift 39 11 186 A1 discloses anindependent classification unit in the form of a fuzzy assessmentdevice, to which the input and output values of the self-setting circuit1 are fed in the form of a difference, and which determines from theclassification results new control constants on the basis of fuzzyrules, provided that an external enabling signal is present.

Furthermore, the journal Elektronik 4/1986, pages 79 to 83, discloses acontroller which adapts itself to the ageing of its connected hardwareby automatic reprogramming and in which a programmable memory with aprocessing unit is integrated on a chip.

SUMMARY OF THE INVENTION

The object on which the invention is based is thus that of specifying acircuit which is able to detect the above-mentioned changes, assess themand change its characteristics correspondingly in order to adapt itselfbetter to the changed external circumstances and, as a result, achievemore optimum control properties or faster processing.

In general terms the present invention is a self-programming circuit.The circuit has a processing unit with an electrically erasable andelectrically programmable read-only memory (EEPROM), a classificationunit and an interface unit. The processing unit reads out processinginformation from the read-only memory. Input values and/or internalvalues and/or output values of the processing unit are processed in theclassification unit to produce classification results. The input valuesand/or the output values of the processing unit also representcorresponding values of the self-programming circuit. An interface unitis provided such that from one of the classification results there isgenerated at least one EEPROM address and at least one EEPROM datum andthe read-only memory (EEPROM) is programmed therewith, if an externalenabling signal is present. The processing unit has a fuzzy controllerwith a knowledge base memory that contains the read-only memory(EEPROM). The classification unit forms the classification results fromthe input values and/or internal values and/or output values on thebasis of a linguistic protocol, as in the case of fuzzy controllers,using IF-THEN rules. The input values are assigned to linguistic valuesof the respective input variables. The linguistic values of the inputvariables are logically combined with the linguistic values of theoutput variables, using the linguistic protocol. The linguistic valuesof an output variable are assigned to the classification results. Theread-only memory (EEPROM) is programmed such that, using an EEPROMaddress, one of at least two alternative association functions isselected for the input variable and/or the output variable.

A major advantage of the invention is that the entire self-programmingcircuit according to the invention can be monolithically integrated in asimple way on account of the relatively modest additional circuitry andthat the circuit comprises only a single element with very few externalconnections.

Advantageous developments of the present invention are as follows.

The read-only memory (EEPROM) is programmed such that, using an EEPROMaddress, one of at least two alternative offset values is selected forthe input value and/or for the output value.

The read-only memory (EEPROM) is programmed such that, using an EEPROMaddress, one of at least two alternative sets of rules is selectedand/or for at least one rule a weighting is selected from at least twoalternative weightings and/or the number of rules of a respective set ofrules is fixed.

The read-only memory (EEPROM) is programmed such that, using an EEPROMaddress, one of at least two alternative rule evaluation methods and/orone of at least two alternative inference methods and/or one of at leasttwo alternative defuzzification methods is selected.

In an alternative embodiment of the processing unit a microprocessorwhose program memory contains the read-only memory (EEPROM). If duringprocessing there occurs a case distinction by ranges for the inputvalues and if the values within the ranges are processed by programmingparts lasting various lengths of time, the classification unitdetermines the frequency of the occurrence of the ranges of the inputvalues. The classification unit reprograms the read-only memory suchthat the sequence of the case distinctions is carried out in accordancewith the frequency of the occurrence of the associated ranges, the casedistinction belonging to the range having the greatest frequency takingplace first.

The processing unit with the electrically erasable and electricallyprogrammable read-only memory (EEPROM), the classification unit and theinterface unit are monolithically integrated on a semiconductor chip.

BRIEF DESCRIPTION OF THE DRAWINGS

The features of the present invention which are believed to be novel,are set forth with particularity in the appended claims. The invention,together with further objects and advantages, may best be understood byreference to the following description taken in conjunction with theaccompanying drawings, in the several Figures of which like referencenumerals identify like elements, and in which:

FIG. 1 shows a block diagram of a self-programming circuit according tothe invention and

FIG. 2 shows a block diagram of part of a preferred development of theself-programming circuit according to the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

In FIG. 1 there is shown a block diagram of a selfprogramming circuitSPSA according to the invention, in which a processing unit VE with anelectrically erasable programmable read-only memory EEPROM, aclassification unit KE and an interface unit (EEPROM interface) EIF areprovided. The complete circuit according to the invention is in thiscase preferably monolithically integrated on a common semiconductor chipand has only external inputs for an enabling signal (enable) EN, anaddress/data bus AD, input values E and output values A of theprocessing unit VE.

The input values E and/or internal values ED, S and/or the output valuesA are fed to the classification unit KE and are processed there to givea classification result K, which for its part is fed to the interfaceunit EIF. The classification unit KE decides whether an EEPROM datum isto be changed or not and, if appropriate, in which way this has to takeplace. The classification unit KE is preferably designed like a fuzzycontroller, the classification strategy being formulated in the form ofIF-THEN rules and being stored in a knowledge memory of theclassification unit. The knowledge memory of the classification unit KEis in this case likewise monolithically integrated on the semiconductorchip of the self-programming circuit.

The IF-THEN rules are typically of the form IF (E=WE) AND (ED=WED) AND(S=WS) AND (A=WA) THEN (K=WK), WX representing the linguistic value ofthe variables X. The values WX are in this case stored in a read-onlymemory (ROM), but there is also the possibility of giving the knowledgememory likewise the form of an electrically erasable and programmableread-only memory (EEPROM) and of providing a further, higher-orderclassification unit, which changes the knowledge base of the lower-orderclassification unit. This principle can, fundamentally, be generalizedto apply to any number of hierarchial levels.

Since in many cases it is adequate that for each class, that is to sayfor each different value which K can assume, there is respectivelyprovided only a single rule, classification units of a relatively simpleconstruction with hard-wired IF-THEN rules are also conceivable.

The processing unit VE takes the form of, for example, a fuzzycontroller, but may also take the form of other microelectronic systems,for example a microprocessor or microcontroller. What is essential hereis that the processing unit permits reading out of the read-only memoryEEPROM and in this way access to the part of the processing informationprogrammed by the circuit SPSA itself is possible and that the variablesE, A and S are in digital form. If the latter is not the case, acorresponding A/D conversion is additionally required.

In FIG. 2 there is shown a block diagram of a processing unit VE in theform of a fuzzy controller FR, which contains a knowledge base memoryKBM, which for its part has a read-only memory ROM and the read-onlymemory EEPROM. Here, the inputs E are the system deviations, the outputsA are the manipulated variables which act on a controlled system.

By reprogramming the read-only memory EEPROM, the following can beeffected in this case, for example initiated by slow changes in thecontrolled system, such as for example ageing or wear: 1.A renewedfixing of one of at least two alternative offset values for the inputvalue (E) and/or for the output value (A) by the EEPROM address EA.

2. A renewed fixing of one of at least two alternative offset values,which is added to a start address for association addresses, in order toshift the functional spectrum to the left or to the right, by an EEPROMaddress EA, this of course presupposing that the memory areas newlyaddressed in this way are occupied by a corresponding addition to thefunctional spectrum.

3. A renewed fixing of the number of rules, in order to include newrules which although already stored are not in the address space, or toremove existing rules from the address space.

4. A renewed fixing of the weighting of at least one rule by an EEPROMaddress EA.

Furthermore, by reprogramming the read-only memory EEPROM, the followingcan be effected, for example initiated by sudden changes in thecontrolled system:

1. A renewed fixing of one of at least two alternative rule evaluationmethods and/or one of at least two alternative inference methods and/orone of at least two alternative defuzzification methods by an EEPROMaddress EA.

2. A renewed fixing of a set of rules, for example for a new producttype or for special "emergency rules" in the case of extreme operatingstates, such as for example in cases where the controlled system isdamaged, by an EEPROM address as the start address.

3. A renewed fixing of input or output association functions by anEEPROM address as the start address.

The above-mentioned fixing operations may occur individually or else incombination. How many EEPROM addresses are required for this in anindividual case depends, for example, on the word length of the EEPROMaddresses and on the type of coding of the above-mentioned fixingoperations.

The internal values S can in this case supply to the classification unitinformation on whether a rule of a set of rules has been affected, orweightings of rules in some form or other.

Instead of a controller, a microprocessor whose program memory containsthe read-only memory EEPROM can be used as the processing unit (VE).Stored in the read-only memory EEPROM are instructions, which theclassification KE replaces, for example, by instructions which shortenthe run time of a program.

If, for example, there takes place in the processing a case distinctionby ranges for the input values (E), the input values occurring withvarying frequency, and if the values within the ranges are processed byprogram parts lasting various lengths of time, the classification unit(KE) may, for example, be designed in such a way that it determines thefrequency of the occurrence of the ranges of the input values (E) andreprograms the read-only memory in such a way that the sequence of thecase distinctions is carried out in accordance with the frequency of theoccurrence of the associated ranges, the case distinction belonging tothe range having the greatest frequency taking place first.

In connection with the type diversity mentioned, to be brought to mindin particular are the various versions of automobile parts, therespective version of which is automatically identified by the fuzzycontroller according to the invention.

The invention is not limited to the particular details of the apparatusdepicted and other modifications and applications are contemplated.Certain other changes may be made in the above described apparatuswithout departing from the true spirit and scope of the invention hereininvolved. It is intended, therefore, that the subject matter in theabove depiction shall be interpreted as illustrative and not in alimiting sense.

What is claimed:
 1. A self-programming circuit, comprising:a processingunit having an electrically erasable and electrically programmableread-only memory, the processing unit connected to a classification unitand an interface unit, the processing unit reading out processinginformation from the read-only memory; the classification unitprocessing at least one of input values, internal values, and outputvalues of the processing unit to produce classification results, theinput values and/or the output values of the processing unit alsorepresenting corresponding values of the self-programming circuit; aninterface unit that effects generating from one of the classificationresults at least one EEPROM address and at least one EEPROM datum, theread-only memory being programmed therewith, if an external enablingsignal is present; and the classification unit forming theclassification results from at least one of the input values, theinternal values and the output values based on a linguistic protocol,which for fuzzy controller uses IF-THEN rules, the input values beingassigned to linguistic values of the respective input variables, thelinguistic values of the input variables being logically combined withlinguistic values of the output variables, using the linguisticprotocol, and linguistic values of an output variable being assigned tothe classification results, the processing unit being a microprocessorhaving a program memory containing the read-only memory; wherein whenduring processing there occurs a case distinction by ranges for theinput values and the values within the ranges are processed byprogramming parts lasting various lengths of time, the classificationunit determines a frequency of occurrence of the ranges of the inputvalues and reprograms the read-only memory such that a sequence of casedistinctions is carried out in accordance with the frequency of theoccurrence of associated ranges, a case distinction belonging to a rangehaving the greatest frequency taking place first.
 2. The circuit asclaimed in claim 1, wherein the processing unit with the electricallyerasable and electrically programmable read-only memory, theclassification unit and the interface unit are monolithically integratedon a semiconductor chip.